Monolithic semiconductor device and method of manufacturing the same

ABSTRACT

A monolithic semiconductor device comprising a substrate, a layer of photoconductive material formed on the substrate, a transparent insulator formed on the photoconductive material and a layer of material which emits light when electrically stimulated, said layer of light emitting material being formed on the transparent insulator. The light emitting material is preferably an organic electro-luminescent material such as a polymer. Particular application of the device is in implementing an analog based neural network and by selection and arrangement of various components the device may also act as a display. A method of manufacturing the device is also disclosed.

BACKGROUND OF THE INVENTION

The present invention relates to a monolithic semiconductor device andmethod of manufacturing the same. Herein the term monolithic means thatthe device has a single substrate.

SUMMARY OF THE INVENTION

According to one aspect of the present invention there is provided amonolithic semiconductor device comprising a substrate, a layer ofphotoconductive material formed on the substrate, a transparentinsulator formed on the photoconductive material and a layer of materialwhich emits light when electrically stimulated, said layer of lightemitting material being formed on the transparent insulator.

Preferably the light emitting layer is an organic electro-luminescentmaterial such as a light emitting polymer.

Beneficially the device is structured and arranged also to act as adisplay.

The present invention also provides a neural network comprising aplurality of the semiconductor devices of the invention.

According to another aspect of the present invention there is provided amethod of manufacturing a monolithic semiconductor device comprising thesteps of providing a substrate, forming a layer of photoconductivematerial on the substrate, forming a transparent insulator on thephotoconductive material, and forming on the transparent insulator alayer of material which emits light when electrically stimulated.

Preferably, the method involves the use of TFT techniques.

Beneficially, the method further comprises the step of formation of aplurality of TFTs on the substrate, said TFTs being respectivelyconnected to the photoconductive and light emitting layers.

BRIEF DESCRIPTION OF THE DRAWINGS

Embodiments of the present invention will now be described by way ofexample only and with reference to the accompanying drawings, in which:

FIG. 1 illustrates a schematic vertical section through a semiconductordevice according to one embodiment of the present invention,

FIG. 2 is a schematic circuit diagram showing implementation of a basicelectro-optical analog neural network and analog vector matrixmultiplication,

FIG. 3 illustrates a development of the arrangement shown in FIG. 2,

FIG. 4 is a schematic circuit arrangement for a neural network using aplurality of semiconductor devices of the type illustrated in FIG. 1,

FIG. 5 is an enlarged plan view of the configuration of the a-Si layerto be included in the arrangement shown in FIG. 6, and

FIG. 6 is a plan view of a neuron and it's synaptic connections in anetwork according to an embodiment of the present invention.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

One embodiment of a semiconductor device according to the presentinvention is illustrated in the schematic vertical section of FIG. 1.The main components of the device are the substrate 12, thephotoconductive layer 16 and the light emitting element 30. Layers 22and 24, between the light emitting material 26 and the photoconductivelayer 16, are transparent.

In detail, the semiconductor device 10 comprises a substrate 12 havingan insulating oxide 14 formed thereon. A layer of amorphous silicon(a-Si) 16 is provided on the oxide 14. A respective n⁺ region 18 isformed at each end of the a-Si layer. These n⁺ terminals 18 arecontacted by respective metal electrodes 20 which extend through atransparent insulator layer 22 which is formed over the a-Si layer 16.Lead lines 21 connect the electrodes to the exterior of the device. Thetransparent insulator 22 may be formed of silicon dioxide. A transparentconductor (such as Indium Tin Oxide) 24 is formed on the transparentinsulator, in self alignment with the active photoconductor region 16.The ITO conductor 24 forms one electrode of the light emitting element30. Thus, a light emitting material 26 is provided above the ITO layer24 and a metal electrode 28 is provided on the opposite side of thelight emitting material 26 to the ITO layer 24. The light emittingmaterial is a PPV and electrode 28 may, for example, be formed of Ca orAl. A field oxide 32 covers the entire upper surface of the overallstructure.

It will be readily apparent to the person skilled in the art that thestructure illustrated in FIG. 1 can be fabricated using conventionalsemiconductor fabrication techniques employing conventional mask and ionimplantation processes. In particular, the device can be fabricatedusing conventional polysilicon TFT techniques.

It will also be readily apparent that the embodiment illustrated in FIG.1 could effectively operate as a layered transistor and thus the ITOshould be connected to ground in order to achieve the operationaleffects described herein.

Preferably, the light emitting element 30 is an organicelectro-luminescent device (OELD). Organic electro-luminescent devicesare sufficiently well known that the active material and operation ofthe device does not require description herein. Such devices are, ofcourse, current driven devices.

A particular advantage of using an OELD and polysilicon TFT technologyto implement the arrangement illustrated in FIG. 1 is that the entirefabrication process can be a low temperature process.

One specific, and non-limiting, application in which the device of FIG.1 can be used in order to gain significant benefits over previousarrangements will now be described in detail. This application is anelectro-optical neural network.

Electro-optical neural networks are known. They provide analogvector-matrix multiplication and are readily suited to parallelprocessing with short overall system response time when the number ofsynapses in the network is high. The analog network mimics the humanneural system more closely than a digital network and should thus bemore capable of analysing abstract ideas than a digital network.However, known electro-optical neural networks suffer from seriouslimitations which have prevented their wide spread use. Thus, one aspectof the present invention is to provide electro-optical neural network.

FIG. 2 is a schematic circuit diagram showing implementation of a basicelectro-optical analog neural network and analog vector matrixmultiplication. The circuit comprises a plurality of photoresistors 40connected between vertical and horizontal conductors in a matrix. Eachphotoresistor constitutes a neuron. The total current flowing out of ahorizontal conductor is the dot product between the vertical conductorsand the conductance values of the horizontal array of photoresistors.Vector matrix multiplication is achieved by applying Ohm's Law and thusthe horizontal current is passed to a current-to-voltage converter andthen to a discriminator. Using the reference symbols used in FIG. 2, thevector matrix multiplication is expressed by:${V_{i}^{\prime} = {\sum\limits_{j = 0}^{N - 1}\quad {A_{i}\quad G_{i,j}U_{j}}}},\quad {{{for}\quad i} = {{0\quad \ldots \quad M} - 1}}$

where A is the gain of the current-to-voltage converter, G is theconductance of the photoconductor, U is the voltage of a verticalconductor, M is the number of horizontal conductors and N is the numberof vertical conductors.

It will be readily apparent that an arrangement as shown in FIG. 2 andimplemented using discrete photoresistors is bulky and very limited inthe number of the number of neurons which can be provided in a practicalembodiment.

FIG. 3 illustrates a development of the basic arrangement in an attemptto overcome the above mentioned disadvantages thereof. As shown in FIG.3, a panel 50 of silicon photoconductors is held in registration with aglass panel 52 of liquid crystal (LC) light shutters 54. Thisconstruction provides a significant reduction in size over the basicarrangement, even allowing for a plurality of shutters to be providedfor each photoconductor. Typically a four by four matrix, ie 16,shutters may be provided for each photoconductor. The whole LC panel isilluminated and each shutter has two states, on and off. Thus a total of17 discrete brightness levels (weightings in the neural network sense)can be differentiated by each photoconductor. In terms of a neuralnetwork, this is still somewhat restrictive for practical applications.A further problem arises in that the arrangement shown in FIG. 3 cansuffer significant cross-talk problems between neighbouring neurons.These problems are exacerbated by the thickness of the glass panel whichnecessarily separates the light source from the light sensors. Further,the device complexity is increased by the number of external connectionsrequired for the photoconductor panel and the LC panel.

The monolithic semiconductor device of the present invention enables afurther improved electro-optical analog neural network to beimplemented.

In the application of the device to a neural network, the deviceillustrated in FIG. 1 constitutes a single neuron and it will beappreciated that a large network of such neurons can be fabricatedsimultaneously on a single silicon wafer. Thus it will be appreciatedthat the integration density is readily enhanced. Further, it isimmediately apparent from FIG. 1 that cross-talk between neurons iseliminated. Also, the complexity of external connections issubstantially reduced compared with the provision of an LC panel and aphotoconductor panel. The network implemented with the semiconductordevices of the present invention differs fundamentally from that shownin FIG. 3 in that a respective and independent light source is providedfor each photoconductor. A significant enhancement is thus that ratherthan 17 discrete weightings each neuron in the network according to thepresent invention can in theory have an infinite number of weightings,as the light source intensity per neuron can be varied continuously andindependently.

A schematic circuit arrangement for a neural network using a pluralityof semiconductor devices according to the present invention is shown inFIG. 4. In accordance with the arrangement of FIG. 4, each OELD isdriven by a polysilicon TFT current source and current summing from thehorizontal conductor is achieved using a polysilicon TFT operationalamplifier configured as a current-to-voltage converter. Thus, an entirenetwork can be implemented on a single wafer using conventional TFTtechnology.

A plan view of a neuron and it's synaptic connections is shown in FIG.6. For ease of understanding an enlarged plan view of the configurationof the a-Si layer is shown in FIG. 5. The illustrated configuration ofthe a-Si layer minimises the contact effect (resistive ratio) so as toenhance the photoconductive property of the layer.

The method of fabricating the arrangement illustrated in FIG. 6, withreference also to FIG. 1, is first to provide the device substrate 12with an insulating oxide 14 and then to form the photoconducting a-Sipattern (16) of FIG. 5 thereon. Next, the transparent insulator SiO₂layer 22 is formed over the photoconductor 16. Then an OELD is formed bysandwiching a light emitting polymer (LEP) between a layer of cathodematerial (28) and a layer of ITO (24). This is followed by ionimplanting the photoconductor terminals 18. Subsequently, vias areetched and metals 1 and 2 are deposited.

Exceptional utility can be achieved with the device illustrated in FIGS.1 and 6 by making the substrate and insulating oxide 14 transparent,since the device can then also be used as a display. In this respect, itwill be appreciated that the illustrated configuration of the a-Si layerdoes not cover the entire illumination area of the device. As an exampleof the utility of such a device, consider a handwriting recognitionsystem in which the a-Si matrix is used to capture optically thehandwriting, the neural network is used to analyse the image and finallythe device is used to display the result of the analysis. Otherapplications of the device include its use in a portable facsimilemachine and its use in brightness control apparatus.

Various modifications can be made without departing from the scope ofthe invention.

What is claimed is:
 1. A monolithic semiconductor device comprising asubstrate, a layer of photoconductive material formed on the substrate,a transparent insulator formed on the photoconductive material and alayer of material which emits light when electrically stimulated, saidlayer of light emitting material being formed on the transparentinsulator.
 2. A semiconductor device as claimed in claim 1, wherein thelight emitting layer is an organic electro-luminescent material.
 3. Asemiconductor device as claimed in claim 1, wherein the light emittinglayer is a light emitting polymer.
 4. A semiconductor device as claimedin claim 1, wherein the area of the photoconductive material is smallerthan the area of the light emitting material.
 5. A semiconductor deviceas claimed in claim 4, wherein the substrate is transparent.
 6. Asemiconductor device as claimed in claim 1, wherein a layer ofinsulating material is provided between the substrate and the layer ofphotoconductive material and a transparent electrode is formed betweenthe transparent insulator and the layer of light emitting material.
 7. Asemiconductor device as claimed in claim 6, wherein the transparentelectrode is an ITO.
 8. A neural network comprising a plurality ofsemiconductor devices as claimed in claim
 1. 9. A method ofmanufacturing a monolithic semiconductor device comprising the steps ofproviding a substrate, forming a layer of photoconductive material onthe substrate, forming a transparent insulator on the photoconductivematerial, and forming on the transparent insulator a layer of materialwhich emits light when electrically stimulated.
 10. A method as claimedin claim 9, further comprising the steps of: forming a layer ofinsulating material on the substrate such that the layer ofphotoconductive material is subsequently formed on the insulatingmaterial; and forming a transparent electrode on the transparentinsulator such that the layer of light emitting material is subsequentlyformed on the transparent electrode.
 11. A method as claimed in claim 9,further comprising the steps of: forming an electrode on the layer oflight emitting material and subsequently formed on the transparentelectrode.
 12. A method as claimed in claim 9, wherein the methodinvolves the use of TFT techniques.
 13. A method as claimed in claim 12,further comprising the step of also forming one or more TFTs on thesubstrate, said TFTs being operatively connected to the photoconductiveand/or light emitting layer.
 14. A semiconductor device as claimed inclaim 2, wherein the light emitting layer is a light emitting polymer.15. A method as claimed in claim 10, further comprising the steps of:forming an electrode on the layer of light emitting material andsubsequently formed on the transparent electrode.
 16. A method asclaimed in claim 10, wherein the method involves the use of TFTtechniques.
 17. A method as claimed in claim 11, wherein the methodinvolves the use of TFT techniques.